EN
IT Link accompanies you from architecture to industrialization, in compliance with standards and deadlines.
In aeronautics, railways, automobiles, space, space, energy or even medical, software cannot break down. A failure can impact the safety of people, the availability of an essential service, or regulatory compliance.
By “high constraints”, we refer to the convergence of requirements that add up: temporal determinism, demonstrable safety, robust cybersecurity, environmental sustainability and life cycle management. The challenge is not only to “make” the system work, but to prove that it works predictably in all relevant situations.
Integrity levels (SIL/ASIL) guide architecture and verification. Our experts deal with dangers through analysis (FMEA/FTA), fault tolerance (detection/diagnosis, degraded modes, fail-safe or fail-operational) and the independence of validation activities. The expected evidence is planned from the start and consolidated in a structured safety case.
Latencies must be limited (strict deadlines, WCRT/WCET as required). This involves controlled scheduling, control of critical sections (priorities, inversions), memory/CPU and I/O optimization (DMA, queues, buffers), as well as network predictability (e.g. real-time windows, TSN when relevant). Margins are measured and monitored over time.
Connected systems require an in-depth defense approach, including secure boot, secret protection (TPM, SE, HSM), encryption of communications and artifacts, signed OTA updates with a rollback mechanism, as well as software partitioning and a rigorous key management policy.
Security is integrated by design (threat modeling) and validated throughout the life cycle through tests, code reviews and continuous operational supervision.
The requirements are fully traceable, from the expression of need to the verification activities and associated evidence. The test plans cover all levels (unitary, integration, system and non-regression) with coverage objectives aligned with the applicable framework (up to the MC/DC if required) and include, where appropriate, the qualification of the tools used. Documentation is produced and maintained on an ongoing basis in order to ensure compliance and to prepare for audits without risk.
The product must remain reliable over time and in its operational environment, while respecting EMC constraints, shocks and vibrations, extended temperature ranges, humidity and energy requirements. Component choices and design rules (derating, margins, etc.) are oriented towards sustainability. Industrialization and maintenance in operational conditions integrate the management of obsolescence and ensure safety throughout the life cycle.
We frame objectives and risks, consolidate requirements and define a target architecture aligned with your margins (latency, safety, security, energy).
The choice of platforms (MCU/SoC/FPGA), buses (CAN, ARINC 429, AFDX, Ethernet TSN...) and OS/RTOS (embedded Linux, QNX, VxWorks, VxWorks, FreeRTOS, ARINC 429, AFDX 429, AFDX, Ethernet TSN...) and OS/RTOS (embedded Linux, QNX, VxWorks, FreeRTOS, FreeRTOS, Zephyr, AUTOSAR) is well founded and documented.
The design follows a tooled V-cycle, with functional partitioning and security by design.
We create low layers (drivers, BSP, HAL), middleware, and real-time applications, by applying code rules (MISRA/CERT C) and C/C++/Rust optimization practices adapted to memory/CPU constraints.
The integration of communication stacks and frameworks (AUTOSAR Classic/Adaptive, POSIX) is mastered and tested on bench.
We establish a verification strategy in accordance with your framework (SIL/ASIL/DO‑178C/EN 50128/IEC 62304), covering unity, integration, system, non-regression and HIL/SIL.
The coverage (up to the MC/DC if required) and the traceability of requirements ↔ tests are managed and we prepare all the documents for the compliance file and the audits.
We design secure architectures (thread modeling, hardening), set up the Secure Boot, the protection of secrets (TEE/TPM/HSM) and updates Signed OTAs with a backtracking strategy.
Compliance with the ISO 21434 and IEC 62443 frameworks is addressed with SBOM and vulnerability management.
We implement a software factory adapted to constrained environments (CI/CD, repeatable builds, signed artifacts), integrate deterministic tests into the pipeline and organize operation and MCO (reverse engineering, obsolescence management, supervision).
Your platform is designed to last and be operated.
Each embedded system is custom designed and developed to meet your technical, regulatory and operational context. The examples below illustrate typical perimeters and do not exhaust our scope of intervention.
Systems where software failure impacts security, availability, or regulatory compliance. We aim for deterministic and provable behaviors.
An RTOS offers strict predictability (limited latencies) for fine control. Linux is suitable for complex processing (networks, AI) with adapted hardening. Hybrid architectures are common.
Depending on the sector: DO‑178C, ISO 26262, EN 50128/50657, EN 50128/50657, IEC 62304, IEC 61508, ISO 21434, IEC 62443, MISRA... We align our deliverables with these frameworks.
Security‑by‑design (threats, attack surface), secure boot, SBOM, secure updates, hardening, integrity monitoring, and vulnerability management.
